Question E6C09:
What is used to design the configuration of a field-programmable gate array (FPGA)?  

Choices:  
A: Karnaugh maps  
B: Hardware description language (HDL)  
C: An auto-router  
D: Machine and assembly language    

Correct Answer is  B: Hardware description language (HDL)  

Correct Answer: B — Hardware description language (HDL)

Why B is correct:
- FPGAs are configured by loading a bitstream generated from an HDL design (e.g., VHDL, Verilog, SystemVerilog).
- The typical flow is: HDL (RTL) → Synthesis (netlist) → Place-and-Route → Bitstream → Program FPGA.
- HDL describes actual hardware structures (flip-flops, LUTs, RAMs, DSPs), not a sequence of instructions.

Why the others are incorrect:
- A: Karnaugh maps
  - Used to manually minimize Boolean expressions for small combinational logic.
  - Not the standard method to configure or program an FPGA; synthesis tools perform optimization automatically.
- C: An auto-router
  - “Autorouter” refers to PCB layout tools that route copper traces between components on a board.
  - FPGA tools do “place-and-route” internally, but that’s not the same as a PCB autorouter and is not what a designer directly uses to describe the design.
- D: Machine and assembly language
  - Assembly is for processors executing instruction streams.
  - FPGAs implement hardware directly; while you can instantiate a soft CPU inside an FPGA and then run assembly on that CPU, the FPGA fabric itself is configured from HDL.

Useful rules of thumb:
- Think “hardware, not software”: HDL describes parallel hardware; assembly targets sequential CPUs.
- Constraints (pinouts, clocks, timing) accompany HDL but do not replace it.
- LUT insight: An $N$-input LUT can implement any Boolean function of its inputs using a truth table with $2^N$ entries; synthesis maps HDL logic into these LUTs and other FPGA resources.