*Question E6C05:
Which of the following digital logic families has the lowest power consumption?*  

*Correct Answer is  D: CMOS*  

### AI Response: (may contain errors)  

The correct answer is **CMOS** (Complementary Metal-Oxide-Semiconductor) because it has the lowest power consumption among the listed digital logic families. Here's a breakdown of why this is the case and why the other options are incorrect:

### Why CMOS is Correct:
- **Power Consumption**: CMOS technology only consumes power during the switching of states (when the output changes from high to low or vice versa). In a static state (when the output is stable), it consumes negligible power because there is no direct current path between the power supply and ground.
- **Efficiency**: The complementary nature of CMOS (using both NMOS and PMOS transistors) allows for very low static power consumption, making it ideal for battery-operated devices and applications where power efficiency is critical.

### Why the Other Choices are Incorrect:
- **A: Schottky TTL (Transistor-Transistor Logic)**:
  - Schottky TTL uses Schottky diodes to reduce switching times, but it still consumes more power than CMOS due to its continuous current draw even when not switching.
  
- **B: ECL (Emitter-Coupled Logic)**:
  - ECL is known for its high-speed operation but has a significantly higher power consumption compared to CMOS. It operates with a constant current, leading to continuous power usage regardless of switching activity.
  
- **C: NMOS (N-Channel Metal-Oxide-Semiconductor)**:
  - NMOS logic gates consume less power than bipolar technologies like TTL, but they still consume more power than CMOS. NMOS devices also have a static power consumption when in a high state, unlike CMOS.

### Summary:
- **CMOS** is the most power-efficient logic family due to its low static power consumption and only consuming power during state changes.
- Other families like Schottky TTL, ECL, and NMOS have higher power consumption due to their design and operational characteristics.

This understanding of power consumption in digital logic families is crucial for the Extra Class exam and practical applications in electronics.