Question E6C08:
In Figure E6-3, which is the schematic symbol for a NAND gate?  

Choices:  
A: 1  
B: 2  
C: 3  
D: 4    

Correct Answer is  B: 2  

To recognize a NAND gate symbol:
- Start with an AND gate shape (D-shaped: curved on the left, flat on the right).
- Add a small inversion bubble at the output. That bubble means “NOT.”

Why choice 2 is correct:
- Symbol 2 shows an AND gate with an output bubble, which is a NAND. Its Boolean output is:
  $$Y = \overline{A \cdot B}$$

Why the other choices are incorrect:
- Choice 1: AND gate without the output bubble → plain AND:
  $$Y = A \cdot B$$
- Choice 3: OR gate with an output bubble → NOR:
  $$Y = \overline{A + B}$$
- Choice 4: OR gate without the bubble → plain OR:
  $$Y = A + B$$

Useful rules of thumb:
- A small bubble indicates inversion (NOT) at that node.
- AND-family symbols are D-shaped; OR-family symbols have a pointed right side and a curved left side.
- De Morgan’s identity connects NAND and OR with input inversions:
  $$\overline{A \cdot B} = \bar A + \bar B$$
  So a NAND is equivalent to an OR with bubbles on both inputs.